Sigma shift keying (SSK): FPGA implementation

Abstract

In this paper, a field-programmable gate array (FPGA) implementation will be presented of a Sigma Shift Keying (SSK) demodulator with optimized detector. Standard deviations of zero mean Gaussian noise signals are being digitally modulated instead of shift keying of a sinusoidal carrier signal. Minimal transmit power output and very low probability of intercept (POI) are the advantages of SSK. Demodulation by means of a stand-alone FPGA system is the final step following our comprehensive theoretical analyses and simulations. These practical tests of the real-time system complete our research activities. Theoretical guidelines are derived for the calculation of the optimal decision thresholds. An overall system test and a comparison of bit error rate (BER) curves both demonstrate the successful operation of the SSK modem.