Broadband tuner on a chip for cable modem, HDTV, and legacy analog standards

2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096) Pub Date : 2000-06-10 DOI:10.1109/RFIC.2000.854407

Bud Taddiken, Will Ezell, Eric Mumper, Ken Clayton, Jim Douglass, Vince Birleson, Jose Esquivel, O. Werther, Angelika Schneider, Jay Bolton, Bill White, Geoff Dawe, Mario Lafuente, Kurt Richter, Joel Michon, Javier Ruiz, John Norsworthy

引用次数: 7

Abstract

Market requirements and implementation of the first broadband tuner on a chip are described. This IC is built in a 0.8-/spl mu/m BICMOS process and includes the entire signal path as well as integrated PLLs. The architecture and design are discussed at the block and transistor levels. Measured results are shown.

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用于电缆调制解调器、高清电视和传统模拟标准的芯片上的宽带调谐器

描述了第一种芯片上宽带调谐器的市场需求和实现。该IC采用0.8-/spl mu/m BICMOS工艺，包括整个信号路径以及集成的锁相环。在模块级和晶体管级讨论了结构和设计。测量结果如下所示。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)

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