Rosheila Darus, J. Pou, G. Konstantinou, S. Ceballos, V. Agelidis
{"title":"Circulating current control and evaluation of carrier dispositions in modular multilevel converters","authors":"Rosheila Darus, J. Pou, G. Konstantinou, S. Ceballos, V. Agelidis","doi":"10.1109/ECCE-ASIA.2013.6579117","DOIUrl":null,"url":null,"abstract":"This paper presents two control techniques to minimize the circulating currents of the modular multilevel converter. The control techniques reduce the amplitude of each capacitor voltage ripple. Multicarrier level-shifted pulse-width-modulation is applied and the performance of interleaving and non-interleaving the carrier waveforms between the upper and the lower arms is reported. The total harmonic distortion of the output common voltage and rms value of the arms currents are benchmarked against the case when such techniques are not employed. The techniques have been verified by simulation using MATLAB/Simulink and PLECS Blockset software. Experimental results from a low power phase-leg prototype built with five sub-modules per arm are also provided.","PeriodicalId":301487,"journal":{"name":"2013 IEEE ECCE Asia Downunder","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"46","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE ECCE Asia Downunder","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE-ASIA.2013.6579117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 46
Abstract
This paper presents two control techniques to minimize the circulating currents of the modular multilevel converter. The control techniques reduce the amplitude of each capacitor voltage ripple. Multicarrier level-shifted pulse-width-modulation is applied and the performance of interleaving and non-interleaving the carrier waveforms between the upper and the lower arms is reported. The total harmonic distortion of the output common voltage and rms value of the arms currents are benchmarked against the case when such techniques are not employed. The techniques have been verified by simulation using MATLAB/Simulink and PLECS Blockset software. Experimental results from a low power phase-leg prototype built with five sub-modules per arm are also provided.