Predicting Thread Profiles across Core Types via Machine Learning on Heterogeneous Multiprocessors

Cha V. Li, V. Petrucci, D. Mossé
{"title":"Predicting Thread Profiles across Core Types via Machine Learning on Heterogeneous Multiprocessors","authors":"Cha V. Li, V. Petrucci, D. Mossé","doi":"10.1109/SBESC.2016.017","DOIUrl":null,"url":null,"abstract":"Given that energy consumption has become one of the most important issues in computer systems, Heterogeneous Multiprocessors (HMPs) have been introduced, where large high performing and small power-efficient cores can co-exist on the same platform and share the processing of the workload. Clearly, the concept is the same whether it is multiple processors on a board or a chip multiprocessor with several cores on a chip. With the advent of HMPs, thread scheduling becomes much more challenging, while having to deal with thread to processor-type mapping. In particular, it is important that the operating system is able to understand the workload behavior when a thread is to be migrated to a core of a different type. In this paper, we describe a thread characterization method that explores machine learning techniques to automate and improve the accuracy of predicting thread execution across different processor types. We use hardware performance counters and use machine learning to predict performance when moving a thread to another core type on heterogeneous processors. We show that our characterization scheme achieves higher structural similarity (SSIM) values when predicting performance indicators, such as instructions per cycle and last-level cache misses, commonly used to determine the mapping of threads to processor types at runtime. We also show that support vector regression achieves higher SSIM values when compared to linear regression, and has very low (1%) overhead.","PeriodicalId":336703,"journal":{"name":"2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBESC.2016.017","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Given that energy consumption has become one of the most important issues in computer systems, Heterogeneous Multiprocessors (HMPs) have been introduced, where large high performing and small power-efficient cores can co-exist on the same platform and share the processing of the workload. Clearly, the concept is the same whether it is multiple processors on a board or a chip multiprocessor with several cores on a chip. With the advent of HMPs, thread scheduling becomes much more challenging, while having to deal with thread to processor-type mapping. In particular, it is important that the operating system is able to understand the workload behavior when a thread is to be migrated to a core of a different type. In this paper, we describe a thread characterization method that explores machine learning techniques to automate and improve the accuracy of predicting thread execution across different processor types. We use hardware performance counters and use machine learning to predict performance when moving a thread to another core type on heterogeneous processors. We show that our characterization scheme achieves higher structural similarity (SSIM) values when predicting performance indicators, such as instructions per cycle and last-level cache misses, commonly used to determine the mapping of threads to processor types at runtime. We also show that support vector regression achieves higher SSIM values when compared to linear regression, and has very low (1%) overhead.
在异构多处理器上通过机器学习预测跨核心类型的线程配置文件
鉴于能源消耗已经成为计算机系统中最重要的问题之一,异构多处理器(hmp)已经被引入,其中大型高性能和小型节能核心可以共存于同一平台上并共享工作负载的处理。显然,无论是板上的多个处理器还是芯片上的多个核心的芯片多处理器,概念都是相同的。随着hmp的出现,线程调度变得更具挑战性,同时必须处理线程到处理器类型的映射。特别重要的是,当要将线程迁移到不同类型的核心时,操作系统能够理解工作负载行为。在本文中,我们描述了一种线程表征方法,该方法探索了机器学习技术,以自动化并提高跨不同处理器类型预测线程执行的准确性。我们使用硬件性能计数器,并使用机器学习来预测在异构处理器上将线程移动到另一个核心类型时的性能。我们表明,我们的表征方案在预测性能指标(如每个周期的指令和最后一级缓存缺失)时实现了更高的结构相似性(SSIM)值,这些性能指标通常用于确定运行时线程到处理器类型的映射。我们还表明,与线性回归相比,支持向量回归实现了更高的SSIM值,并且开销非常低(1%)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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