A Method to Improve the Testing Efficiency of ADC and Some RF Chips

Abstract

At present, with the development of semiconductor technology, IC test cost accounts for an increasing proportion of the total cost of chip products. How to reduce the cost of IC test has become the focus of the integrated circuit industry. This article proposes a method to improve the testing efficiency based on some dynamic parameters of ADCs and radio frequency chips. Aiming at the characteristic that the traditional sine wave test method can only test one frequency point at a time, this method can realize the test of multiple frequency points at a time, which reduces the chip test time and the test cost.