Design of High-performance Super-resolution Spaceborne SAR Real-time Imaging Chip

Abstract

Aiming at the requirements of spaceborne SAR for high-performance and low-power onboard processors with ultra-high-precision real-time imaging capabilities, we propose a design method for a chip that is capable of high-performance super-resolution real-time imaging in this paper, which can solve the challenges of miniaturization and low power consumption in the current spaceborne processing system. Based on FFBP super-resolution imaging algorithm, the architecture of the spaceborne SAR chip and the high-performance processing engine on the chip are designed, and the structure of the super-resolution SAR real-time imaging parallel processing system is described. Based on the existing work, the chip’s resource consumption and real-time imaging performance are evaluated in a specific processing scenario. The analysis shows that the design of the ultra-high-resolution SAR imaging chip in this paper can greatly reduce the image acquisition time and effectively reduce the power consumption of the spaceborne SAR imaging system, which can provide a reference for the development of related chips.