A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) Pub Date : 2022-06-12 DOI:10.1109/vlsitechnologyandcir46769.2022.9830166

Kazunori Hasebe, Shinichirou Etou, D. Miyazaki, Taiki Iguchi, Yuki Yagishita, Mika Takasaki, Takeru Nogamida, Hiroyuki Watanabe, T. Matsumoto, Y. Katayama

引用次数: 6

Abstract

Noise-Shaping (NS) SAR ADCs can have high Dynamic Range (DR) and be easily adopted to IoT, audio and many other applications. This paper proposes four techniques to improve the DR and conversion speed of NS SAR ADCs. A prototype NS SAR ADC achieves SNDR/SNR/SFDR of 98.3dB/99.3dB/108.5dB with 100kHz bandwidth and 12.8MS/s. Schreier FoM reaches 175.3dB.

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一种100khz带宽98.3dB-SNDR噪声整形SAR ADC，具有改进的失配误差整形和加速技术

噪声整形(NS) SAR adc具有高动态范围(DR)，可轻松应用于物联网、音频和许多其他应用。本文提出了提高NS SAR adc的DR和转换速度的四种技术。原型NS SAR ADC在100kHz带宽和12.8MS/s下实现了98.3dB/99.3dB/108.5dB的SNDR/SNR/SFDR。Schreier FoM达到175.3dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

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