{"title":"Sourcery VSIPL++ HPEC Benchmark Performance","authors":"J. Bergmann, D. McCoy","doi":"10.1109/HPCMP-UGC.2006.65","DOIUrl":null,"url":null,"abstract":"Sourcery VSIPL++ is a high-performance, parallel, multi-platform implementation of the VSIPL++ standard, an open-architecture API for vector, signal, and image processing. Sourcery VSIPL++ allows users to develop signal-processing applications that are portable across multiple platforms and scalable across different machine sizes. This reduces program risk by avoiding lock-in to a particular vendor, platform, or technology. It allows programs to choose the best available commercial-off-the-shelf (COTS) technology and still take advantage of the technology refresh cycle. It lowers schedule pressure by enabling development to start on low-cost commodity systems before embedded systems are even available and by allowing development to initially focus on correctness of serial algorithms before optimizing for parallel performance","PeriodicalId":173959,"journal":{"name":"2006 HPCMP Users Group Conference (HPCMP-UGC'06)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 HPCMP Users Group Conference (HPCMP-UGC'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCMP-UGC.2006.65","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Sourcery VSIPL++ is a high-performance, parallel, multi-platform implementation of the VSIPL++ standard, an open-architecture API for vector, signal, and image processing. Sourcery VSIPL++ allows users to develop signal-processing applications that are portable across multiple platforms and scalable across different machine sizes. This reduces program risk by avoiding lock-in to a particular vendor, platform, or technology. It allows programs to choose the best available commercial-off-the-shelf (COTS) technology and still take advantage of the technology refresh cycle. It lowers schedule pressure by enabling development to start on low-cost commodity systems before embedded systems are even available and by allowing development to initially focus on correctness of serial algorithms before optimizing for parallel performance