Opening pandora's box: Implication of RLUT on secure FPGA applications and IP security

Abstract

Modern FPGAs, due to its many advanced features, have become a popular implementation platform for various applications like aerospace, defence, automotive, cryptography and many more. Additionally, modern FPGAs are equipped with high performance hard-IPs which has reduced the performance gap between ASIC and FPGAs significantly. Dynamically Reconfigurable Look-up-Tables (RLUT) is an advanced feature of modern FPGAs whose content can be updated internally, even during run-time without requiring any bit-stream update. These RLUTs can be used to develop stealthy hardware Trojans with zero overhead payload designs. This phenomenon when combined with an efficient triggering methodology, can lead to the insertion of covert back-doors in cryptographic applications. Furthermore, RLUTs can be deployed for developing customizable S-Box and lightweight S-Box masking schemes. This lightweight S-Box masking scheme when combined with other non-efficient side channel countermeasures (like shuffling) can generate lightweight and efficient side channel countermeasure for lightweight cryptographic applications. Additionally, RLUTs can also be applied to solve long standing problem of FPGA based IP protection. FPGA vendors are making serious efforts for IP protection leading to standardization schemes like IEEE P1735. However, efficient techniques to prevent unauthorized overuse of IP still remain an open question. In this work, we have developed an efficient IP licensing scheme by combining RLUTs with physically unclonable functions (PUFs) and a lightweight cryptographic application. This work summarizes applications of RLUTs for different applications related with FPGA security. It shows applicability of RLUTs for security application on FPGA and its applicability on FPGA security by development of IP licensing protocols