VC-1 video decoder optimization on ARM Cortex-A8 with NEON

C. Pujara, Anurag Modi, G. Sandeep, Shilpa Inamdar, Deepa Kolavil, V. Tholath
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引用次数: 5

Abstract

Optimization of VC-1 Main profile decoder has been proposed using SIMD engine (NEON) of ARM Cortex-A8 processor. We have exploited data level parallelism to effectively use the SIMD capability of NEON. Ideas to make the algorithms SIMD friendly are also highlighted. With effective use of ARM Cortex- A8 architecture and NEON SIMD engine, the MCPS (Mega Cycles per second) requirement for decoding has reduced considerably as compared to our optimized C implementation. Results are provided for the overall performance gain in decoding and individual performance gain in various modules of VC-1 Main profile decoder.
基于NEON的ARM Cortex-A8上VC-1视频解码器优化
利用ARM Cortex-A8处理器的SIMD引擎(NEON)对VC-1主剖面解码器进行了优化。我们利用数据级并行性来有效地使用NEON的SIMD功能。还强调了使算法对SIMD友好的想法。通过有效地使用ARM Cortex- A8架构和NEON SIMD引擎,与我们优化的C实现相比,解码的MCPS(每秒百万周期)要求大大降低。给出了VC-1主剖面解码器各模块在解码过程中的总体性能增益和单个性能增益的结果。
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