Design and Implementation of 32-bit Functional Unit for RISC architecture applications

Abstract

This paper presents the design and implementation of 32-bit Functional unit which is used for RISC based processor. This includes designing of processor modules such as Arithmetic and Logic unit (ALU) which realizes addition, subtraction, multiplication, shifting and code conversion by suitable control units and data paths. Multiplexers are used for selecting various operations based on the control inputs. These functional blocks are developed using the Hardware Description Language (HDL). Simulation and synthesis of each block is carried using Xilinx ISE to analyze the results. Results of proposed design has been compared with the conventional Microprocessor without interlocked Pipeline Stages (MIPS) which shows reduction in power dissipation by 30.449%, area by 6% and delay by 34.49%.