A heuristic algorithm for via minimization in VLSI channel routing

B. Das, Ashim Kumar Mahato, Ajoy Kumar Khan
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Abstract

We know that via minimization is a very important problem in channel routing. The main aim of via minimization is to improve the circuit performance and productivity, to reduce the completion rate of routing and also to fabricate integrated circuit correctly. In this paper, we are using a heuristic algorithm for solving via minimization problem in VLSI channel routing with movable terminal. Here we concentrate on how fast we find out maximum independent set from the net intersection graph. That is why here we use heuristic technique to find the maximum independent set of a graph with polynomial time complexity. Next, we show how to use that maximum independent set to solve the via minimization problem using an example. Then, we show the experimental results and hardcopy solutions of some channel instances to prove the efficiency of this approach.
VLSI通道路由中导通最小化的启发式算法
通过最小化是信道路由中一个非常重要的问题。通过最小化的主要目的是提高电路的性能和生产效率,降低布线完成率,并正确地制造集成电路。本文采用一种启发式算法来求解带移动终端的VLSI通道路由中的最小化问题。这里我们关注的是如何快速地从相交图中找到最大独立集。这就是为什么这里我们使用启发式技术来寻找具有多项式时间复杂度的图的最大独立集。接下来,我们将通过一个例子展示如何使用最大独立集来解决最小化问题。然后,我们给出了一些通道实例的实验结果和硬拷贝解决方案,以证明该方法的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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