High voltage LDMOS transistors in sub-micron SOI films

Abstract

Silicon-on-insulator (SOI) LDMOS transistors with a linearly graded doping profile in the drift region have been found to exhibit both low on-resistance and high breakdown voltage. High-side operation is a problem for devices built in very thin SOI layers due to pinch-off of the drift region. This is less of a problem for devices built in thicker SOI layers. Devices built in thicker SOI films also are more tolerant of manufacturing variations and offer more predictable behaviour. Non-uniform self-heating within the drift region has been measured for the first time. A breakdown voltage of 1020 V is reported for a LDMOS transistor made in a 0.15 /spl mu/m SOI layer.