Modeling of dynamic switching currents of digital VLSI IC modules and verification by on-chip measurement

A. Gstottner, J. Kruppa, M. Huemer
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引用次数: 4

Abstract

Tough requirements on electromagnetic compatibility (EMC) of electronic equipment forces the demand for low electromagnetic emission (EME) of integrated circuit devices. To enable an efficient application of measures reducing the noise emission, automatic model generation tools are needed to be part of the design flow. In this paper we present a method for high level modeling of dynamic switching currents of complex digital IC modules as well as the verification of the simulation results with a high speed on-chip current and voltage sensor. The current profile calculation for single modules is based on statistical approaches, and parasitic effects of cell interconnects are modeled by utilizing signal processing methods.
数字VLSI集成电路模块动态开关电流建模及片上测量验证
对电子设备的电磁兼容性(EMC)要求高,要求集成电路器件的电磁发射(EME)低。为了有效地应用减少噪声排放的措施,自动模型生成工具需要成为设计流程的一部分。本文提出了一种复杂数字集成电路模块动态开关电流的高级建模方法,并用高速片上电流和电压传感器对仿真结果进行了验证。目前单模块的剖面计算是基于统计方法,而细胞互连的寄生效应是利用信号处理方法建模的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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