Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks

J. Rettkowski, Safdar Mahmood, Arij Shallufa, M. Hübner, D. Göhringer
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引用次数: 1

Abstract

Incorporating FPGAs in embedded designs, both for research and industry related applications, is getting increasingly common. Due to the inherent capability of an FPGA to reconfigure itself during run-time, entirely or partially, it has become a very cost effective and time efficient solution for end-users with ever-changing needs for their embedded and custom hardware designs. This capability allowing dynamic reconfiguration of FPGAs, unfortunately also poses a threat to hardware security in terms of malicious bitstream manipulation that can include attacks through intended hardware changes by insertion of hardware trojans, spy-wares or even energy thirsty hardware modules which eventually have adverse effects on energy critical applications. In this paper, we introduce a novel approach to tackle this problem using machine learning techniques for FPGA bitstream analysis. By making use of different Neural Networks, we present how it paves a way to analyze partial FPGA bistreams to trace a certain module, or to find inconsistencies which can be malicious to the target hardware. In contrast to traditional methods to inspect bitstreams, our method saves a significant amount of time.
用人工神经网络检测fpga的部分比特流
将fpga集成到嵌入式设计中,无论是用于研究还是工业相关应用,都变得越来越普遍。由于FPGA在运行时完全或部分重新配置自身的固有能力,它已成为具有不断变化的嵌入式和定制硬件设计需求的最终用户的非常经济有效和省时的解决方案。这种功能允许fpga的动态重新配置,不幸的是,也对硬件安全构成了威胁,恶意比特流操纵,包括通过插入硬件木马,间谍软件甚至能源消耗的硬件模块,最终对能源关键应用产生不利影响,通过预期的硬件更改进行攻击。在本文中,我们介绍了一种新的方法来解决这个问题,使用机器学习技术进行FPGA比特流分析。通过使用不同的神经网络,我们展示了它如何为分析部分FPGA双流以跟踪某个模块或发现可能对目标硬件造成恶意的不一致铺平了道路。与传统的检查比特流的方法相比,我们的方法节省了大量的时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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