Advanced Design Techniques for Integrated Voltage Controlled LC Oscillators

Abstract

This paper reviews basic trade-offs in oscillator performance specifications. The better understanding of phase noise mechanisms as well as the availability of reliable phase noise simulation tools has led to significant improvements in the power-noise trade-off in recent years. It has further enabled the invention of oscillator topologies which exhibit lower device noise to phase noise conversion, and in this paper pulsed biasing and its implementation through tail-current shaping is described as an example. Area reduction of LC oscillators is further investigated as the large size of oscillators' on-chip LC tank circuits is becoming a significant problem in deeply scaled SOC designs which often require multiple on-chip oscillators.