A Crucial Step of Quantum-dot Cellular Automatic Placement and Routing

Abstract

Quantum-dot Cellular Automata (QCA) is a promising nano-device for next generation integrated circuit. QCA has the characteristics of low power consumption and high operational speed. As the scale and complexity getting larger, automatic placement and routing (P&R) for QCA circuits has attracted the attention of researchers. At present, all the state-of-the-art tools accomplish the P&R work in logic gate level. Although some of them can establish final cell level layout through technology mapping, whether the mapped result contains defects in the sense of circuit design is not considered at all. In this paper, we propose the concept of design rule checking (DRC) of QCA circuit in P&R algorithms for the first time. Four concrete DRC rules are proposed, with the help of which the P&R algorithm can effectively control the positions of inputs, outputs and logic gates, and optimizes various aspects of the circuit such as the number of wire crossings. Experiments show that with the assistance of DRC, correctly functioning cell level layout is far more easily obtained than ever before.