{"title":"A high-speed vision processor based on pixel-parallel PE array and its applications","authors":"Cong Shi, N. Wu, Zhihua Wang","doi":"10.1109/YCICT.2010.5713151","DOIUrl":null,"url":null,"abstract":"This paper proposes a novel high-speed vision processor based on pixel-parallel PE array. The processor consists of a pixel-parallel PE array, an embedded RISC core, an AHB bus, some SRAM blocks and other logical controllers. PE array performs the low- and mid-level vision processing, and RISC core carries out the high-level vision processing in succession. The vision processor can process vision information at a speed higher than 1000fps. Many application algorithms can be implemented by software programming on the vision processor. The processor prototype is implemented on a FPGA board with a 64×64 PE array and the clock frequency is 100MHz. It can realize moving detection in 128×128 image data at a rate of 4500fps, and 104fps in complicated face detection task for 160×120 video frame sequence. The results demonstrated that the vision processor outperforms the general serial CPUs for more than 60 times.","PeriodicalId":179847,"journal":{"name":"2010 IEEE Youth Conference on Information, Computing and Telecommunications","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Youth Conference on Information, Computing and Telecommunications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/YCICT.2010.5713151","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper proposes a novel high-speed vision processor based on pixel-parallel PE array. The processor consists of a pixel-parallel PE array, an embedded RISC core, an AHB bus, some SRAM blocks and other logical controllers. PE array performs the low- and mid-level vision processing, and RISC core carries out the high-level vision processing in succession. The vision processor can process vision information at a speed higher than 1000fps. Many application algorithms can be implemented by software programming on the vision processor. The processor prototype is implemented on a FPGA board with a 64×64 PE array and the clock frequency is 100MHz. It can realize moving detection in 128×128 image data at a rate of 4500fps, and 104fps in complicated face detection task for 160×120 video frame sequence. The results demonstrated that the vision processor outperforms the general serial CPUs for more than 60 times.