High voltage DMOS power FETs on thin SOI substrates

J. O'connor, V. Luciani, A. Caviglia
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引用次数: 4

Abstract

A 90 V, 1.3 A double-diffused MOS (DMOS) power FET fabricated on a 400 nm thick SOI (silicon-on-insulator) film is reported. By utilizing thin SOI materials, these devices can be easily integrated with analog and digital devices to form smart power monolithic circuits. The power devices can be isolated from each other and from the control circuitry by either etching or oxidizing (local oxidation of silicon) through the thin SOI layer, and both high and low side drivers can be combined on a single chip. The thin SOI layer virtually eliminates step coverage problems with interconnects and avoids complicated planarization schemes often needed for dielectrically isolated power devices.<>
薄SOI基板上的高压DMOS功率场效应管
报道了在400 nm厚SOI(绝缘体上硅)薄膜上制备的90v、1.3 A双扩散MOS (DMOS)功率场效应管。通过使用薄SOI材料,这些器件可以很容易地与模拟和数字器件集成,形成智能电源单片电路。通过薄SOI层,通过蚀刻或氧化(硅的局部氧化),功率器件可以相互隔离,也可以与控制电路隔离,并且高侧和低侧驱动器可以组合在单个芯片上。薄SOI层实际上消除了互连的台阶覆盖问题,并避免了介电隔离功率器件通常需要的复杂的平面化方案。
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