SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype

Abstract

Stacked DRAM products are now available, and the likelihood of future products combining DRAM stacks with custom logic layers seems high. The near-memory processor in such a system will have to be energy efficient, latency tolerant, and capable of exploiting both high memory-level parallelism and high memory bandwidth. We believe that single-instruction-multiple-thread (SIMT) processors are uniquely suited to this task, and for the purpose of evaluating this claim have produced an FPGA-based prototype.