Amorphous silicon thin film transistors formed by plasma enhanced deposition at 110/spl deg/C on transparent glass/plastic substrates

Abstract

This article demonstrates good quality amorphous silicon thin film transistors (TFT) fabricated with a maximum processing temperature of 110/spl deg/C on glass or flexible transparent plastic substrates, using rf plasma enhanced chemical vapor deposition. Hydrogen diluted silane was used for the preparation of the amorphous silicon (a-Si), while SiH/sub 4//NH/sub 3//N/sub 2/ or SiH/sub 4//NH/sub 3//N/sub 2//H/sub 2/ mixtures were used for the preparation of silicon nitride (SiN/sub x/) films. Gate and source/drain metal was sputter deposited molybdenum. Plastic substrates were indium tin oxide (ITO) coated polyethylene terephthalate (PET). Transistors formed, using the same processes, on glass and plastic show linear mobilities of 0.33 and 0.12 cm/sup 2//Vs, respectively, with I/sub ON/I/sub OFF/ ratios greater than 10/sup 6/. For transistors on glass, the achieved highest linear mobility is 0.54 cm/sup 2//Vs. The stability of transistors was characterized using electrical stress measurements. The threshold voltage shift is 5.0 volt for a typical transistor on glass substrate, using a stress condition of Vg=25 volt, 600 seconds. Without applying electrical stresses, threshold voltages and linear mobilities of all transistors were found to increase with storage time. We suggest that the relaxation of the interface (SiN/sub x//a-Si) through the bond breaking of the weakest Si-Si bonds contributes to the observation.