Quality of electronic design: from architectural level to test coverage

Abstract

The purpose of this paper is to present a design methodology that complements existing methodologies by addressing the upper and the lower extremes of the design flow. The aim of the methodology is to increase design and product quality. At system level, emphasis is given to architecture generation, reconfiguration and quality assessment. Quality metrics and criteria, focused on design and test issues, are used for the purpose. At physical level, a Defect-Oriented Test (DOT) approach and test reuse are the basis of the methodology to estimate test effectiveness, or defects coverage. Tools which implement the methodology are presented. Results are shown for a public domain PIC processor, used as a SOC embedded core.