The pixel machine: a parallel image computer

M. Potmesil, E. Hoffert
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引用次数: 127

Abstract

We describe the system architecture and the programming environment of the Pixel Machine - a parallel image computer with a distributed frame buffer.The architecture of the computer is based on an array of asynchronous MIMD nodes with parallel access to a large frame buffer. The machine consists of a pipeline of pipe nodes which execute sequential algorithms and an array of m × n pixel nodes which execute parallel algorithms. A pixel node directly accesses every m-th pixel on every n-th scan line of an interleaved frame buffer. Each processing node is based on a high-speed, floating-point programmable processor.The programmability of the computer allows all algorithms to be implemented in software. We present the mappings of a number of geometry and image-computing algorithms onto the machine and analyze their performance.
像素机:一种并行图像计算机
介绍了具有分布式帧缓冲区的并行图像计算机像素机的系统结构和编程环境。计算机的体系结构基于异步MIMD节点阵列,这些节点可以并行访问一个大的帧缓冲区。该机器由执行顺序算法的管道节点和执行并行算法的m × n像素节点阵列组成。像素节点直接访问交错帧缓冲区的每n个扫描线上的每m个像素。每个处理节点都基于一个高速浮点可编程处理器。计算机的可编程性使得所有的算法都可以在软件中实现。我们提出了许多几何和图像计算算法在机器上的映射,并分析了它们的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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