{"title":"FPGA Implementation of Support Vector Machine for Gait Activity Classification","authors":"Madaoui Lotfi, M. Kedir-Talha","doi":"10.1109/EDiS57230.2022.9996523","DOIUrl":null,"url":null,"abstract":"People with lower limb amputations suffer from mobility limitations that degrade their quality of life. In this paper, we propose a hardware system dedicated to human walking activity recognition for smart prostheses, which uses a support vector machine (SVM) algorithm and time domain features to perform activity classification. To achieve a flexible and efficient hardware design, the architecture is implemented on FPGA Nexys 4 Artix 7 board using the Xilinx System Generator (XSG) for DSP. The performance evaluation of the proposed system has been done through a comparative study, the comparison has been done between floating point MATLAB results and fixed point XSG results.","PeriodicalId":288133,"journal":{"name":"2022 3rd International Conference on Embedded & Distributed Systems (EDiS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 3rd International Conference on Embedded & Distributed Systems (EDiS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDiS57230.2022.9996523","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
People with lower limb amputations suffer from mobility limitations that degrade their quality of life. In this paper, we propose a hardware system dedicated to human walking activity recognition for smart prostheses, which uses a support vector machine (SVM) algorithm and time domain features to perform activity classification. To achieve a flexible and efficient hardware design, the architecture is implemented on FPGA Nexys 4 Artix 7 board using the Xilinx System Generator (XSG) for DSP. The performance evaluation of the proposed system has been done through a comparative study, the comparison has been done between floating point MATLAB results and fixed point XSG results.