{"title":"Cascaded high-gain distributed amplifier configuration for enhanced gain-bandwidth product","authors":"Panus Sinsoontornpong, I. Roopkom, A. Worapishet","doi":"10.1109/ECTICON.2013.6559567","DOIUrl":null,"url":null,"abstract":"An improved distributed amplifier configuration based on a cascade of high-gain distributed amplifiers is introduced and investigated in this paper. The cascaded high-gain amplifier offers a multiplicative gain characteristic against the number of stages N and thus gain-bandwidth enhancement. The cascade connection also enables the use of the tapered drain line technique with no idle termination for further gain improvement. Verification is provided through simulation using a 0.18 μm RF CMOS process.","PeriodicalId":273802,"journal":{"name":"2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTICON.2013.6559567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
An improved distributed amplifier configuration based on a cascade of high-gain distributed amplifiers is introduced and investigated in this paper. The cascaded high-gain amplifier offers a multiplicative gain characteristic against the number of stages N and thus gain-bandwidth enhancement. The cascade connection also enables the use of the tapered drain line technique with no idle termination for further gain improvement. Verification is provided through simulation using a 0.18 μm RF CMOS process.