Alireza E. Khosroshahi, Liwei Wang, Hoda Dadashzadeh, Hossein Ardi, Amir Farakhor, A. M. Shotorbani
{"title":"A Two-Stage Coupled-Inductor-Based Cascaded DC-DC Converter with a High Voltage Gain","authors":"Alireza E. Khosroshahi, Liwei Wang, Hoda Dadashzadeh, Hossein Ardi, Amir Farakhor, A. M. Shotorbani","doi":"10.1109/CCECE.2019.8861768","DOIUrl":null,"url":null,"abstract":"In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with modified converter topology. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the blocking voltage across the MOSFET switch is reduced in the proposed topology due to voltage clamp circuit. Thus, a low on-resistance (R$_{DS-on}$) switch can be used to reduce conduction loss. The steady-state analysis of the proposed converter is presented in the paper. Finally, the proposed converter is simulated in MATLAB/SIMULINK to verify the converter performance.","PeriodicalId":352860,"journal":{"name":"2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCECE.2019.8861768","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
In this paper, a new high step-up cascaded DC-DC converter is presented. The first stage of the proposed converter is a buck-boost converter with modified converter topology. The second stage is a boost converter with coupled inductor and voltage multiplier cells. The energy stored in the leakage inductor of the coupled inductor is recycled by a passive voltage clamp to a capacitor thereby improving the efficiency. Besides, the blocking voltage across the MOSFET switch is reduced in the proposed topology due to voltage clamp circuit. Thus, a low on-resistance (R$_{DS-on}$) switch can be used to reduce conduction loss. The steady-state analysis of the proposed converter is presented in the paper. Finally, the proposed converter is simulated in MATLAB/SIMULINK to verify the converter performance.