Extensible processor speeds up IP lookup

P. Gautam, M. Jagtap
{"title":"Extensible processor speeds up IP lookup","authors":"P. Gautam, M. Jagtap","doi":"10.1109/ICON.2012.6506593","DOIUrl":null,"url":null,"abstract":"With ever increasing internet link speeds and growing routing table size, IP address lookup has been major performance bottleneck for routers. Traditionally ASIC or CAM based solutions are used to achieve the demanding performance requirements of IP lookup. These solutions are costly as well as lack programmability, scalability and flexibility. Upgradation of services and protocols necessitates programmability of routers. In this paper, we present a cost effective and flexible solution to achieve fast IP lookup using extensible and configurable processor. Configurable and extensible processor can be tuned by the designer to accelerate applications by selecting suitable processor parameters, adding new instructions and hardware. We have used Eatherton Tree Bitmap algorithms for address lookup and developed instructions that are optimized to yield large performance improvements. With the addition of these newly created instructions, a lookup performance of 17.5 Million lookups per second (Mlps) is achieved for processor running at 500 Mhz.","PeriodicalId":234594,"journal":{"name":"2012 18th IEEE International Conference on Networks (ICON)","volume":"92 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 18th IEEE International Conference on Networks (ICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICON.2012.6506593","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

With ever increasing internet link speeds and growing routing table size, IP address lookup has been major performance bottleneck for routers. Traditionally ASIC or CAM based solutions are used to achieve the demanding performance requirements of IP lookup. These solutions are costly as well as lack programmability, scalability and flexibility. Upgradation of services and protocols necessitates programmability of routers. In this paper, we present a cost effective and flexible solution to achieve fast IP lookup using extensible and configurable processor. Configurable and extensible processor can be tuned by the designer to accelerate applications by selecting suitable processor parameters, adding new instructions and hardware. We have used Eatherton Tree Bitmap algorithms for address lookup and developed instructions that are optimized to yield large performance improvements. With the addition of these newly created instructions, a lookup performance of 17.5 Million lookups per second (Mlps) is achieved for processor running at 500 Mhz.
可扩展处理器加速IP查找
随着互联网连接速度的不断提高和路由表大小的不断增长,IP地址查找已经成为路由器的主要性能瓶颈。传统上,基于ASIC或CAM的解决方案用于实现IP查找的苛刻性能要求。这些解决方案成本高昂,而且缺乏可编程性、可扩展性和灵活性。业务和协议的升级需要路由器的可编程性。在本文中,我们提出了一个经济有效和灵活的解决方案,以实现快速IP查找使用可扩展和可配置的处理器。可配置和可扩展的处理器可以由设计人员通过选择合适的处理器参数,添加新的指令和硬件来加速应用程序。我们使用了etherton树位图算法进行地址查找,并开发了优化的指令,以产生巨大的性能改进。通过添加这些新创建的指令,在500 Mhz运行的处理器上实现了每秒1750万次查找(Mlps)的查找性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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