Data Leakage through Self-Terminated Write Schemes in Memristive Caches

Jonas Krautter, M. Mayahinia, Dennis R. E. Gnad, M. Tahoori
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引用次数: 1

Abstract

Memory cells in emerging non-volatile resistive memories often have asymmetric switching properties, where reliable write operations are achieved by setting the write period to a fixed value. To improve their performance and energy efficiency, self-terminating write schemes have been proposed, in which the write signal is stopped after the required state change has been observed. In this work, we show how this data-dependent write latency can be exploited as a side-channel in multiple ways to unveil restricted memory content. Moreover, we discuss and evaluate potential approaches to address the issue.
记忆缓存中自终止写机制导致的数据泄漏
新兴的非易失性电阻存储器中的存储单元通常具有非对称开关特性,通过将写入周期设置为固定值来实现可靠的写入操作。为了提高它们的性能和能效,提出了自终止写入方案,在观察到所需的状态变化后停止写入信号。在这项工作中,我们展示了如何以多种方式利用这种依赖于数据的写延迟作为侧通道来揭示受限的内存内容。此外,我们讨论和评估潜在的方法来解决这个问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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