Allocation and data arrival design of hard real-time systems

Abstract

The paper presents new models for process activation and process scheduling for real-time embedded systems. The authors introduce a realistic, yet high-level input data arrival model which includes both polled and interrupt-driven process activation. They consider the effect of combinations of these process activation styles on a static, priority-based, preemptive scheduler. Given a set of periodic tasks and a set of resources (e.g. processors), a configuration is defined as: i) a mapping of each process to a resource; ii) assignment of priority to each process; and iii) a mapping of each interprocess communication event to either a polled or interrupt-driven implementation. They present a new method which utilizes an exact schedule analysis to determine a configuration which can meet hard real time deadlines subject to a fixed limit on the number of interrupts available per resource. Task graph examples and comparisons are used to validate the method.