Selecting a Programming Scheme for Memristor Elements

E. Bukvarev, K. Fomina, S. Shchanikov
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Abstract

Introduction. An array of memristive elements can be used in prospective neural computing systems as a programmable resistance (analog multiplication factor) when performing operations of analog vector multiplication, discrete in time. To form the required resistance, the memristor should be subjected to a programming procedure. This article discusses conventional programming schemes and proposes a new versatile programming scheme for memristor elements.Aim. To identify or develop an optimal programming scheme for memristors by analyzing the advantages and disadvantages of existing methods.Materials and methods. The programming procedure can be carried out using either SET or RESET, depending on a different direction of movement according to the volt-ampere characteristic of the memory and its transfer to a particular state. The programming process is controlled in the LTspice circuit modeling program.Results. Typical programming schemes of memristors were analyzed; advantages and disadvantages of existing methods were revealed. A new versatile circuit based on a variable resistor was proposed. The circuit was simulated both under a fixed resistance of the variable resistor and when varying the memristor resistance values within their permissible range.Conclusion. In comparison with the RESET mode, the SET programming mode provides for a greater linearity of variations in the memristor resistance. The use of a circuit based on a variable resistor and a bipolar voltage source allows programming of any type and eliminates the need for recommutation of the memristor. The simulation results confirm the feasibility of the proposed method. The proposed circuit can be complemented not only with a comparator, but also with an ADC. This will provide the possibility of selecting various means for measuring the memristor resistance both during programming and for the purpose of monitoring the memristor resistance at the end of the procedure.
忆阻器元件编程方案的选择
介绍。忆阻元件阵列可以在未来的神经计算系统中用作可编程电阻(模拟乘法因子),当执行模拟向量乘法运算时,在时间上离散。为了形成所需的电阻,应该对忆阻器进行编程。本文讨论了传统的编程方案,提出了一种新的忆阻器元件通用编程方案。通过分析现有方法的优缺点,确定或开发忆阻器的最佳编程方案。材料和方法。编程过程可以使用SET或RESET,根据存储器的伏安特性及其转移到特定状态的不同移动方向来执行。在LTspice电路建模程序中控制编程过程。分析了典型的忆阻器编程方案;分析了现有方法的优缺点。提出了一种基于可变电阻的通用电路。在可变电阻器的固定阻值和在允许范围内改变忆阻器阻值时,对电路进行了模拟。与RESET模式相比,SET编程模式提供了更大的线性变化的忆阻电阻。基于可变电阻和双极电压源的电路的使用允许任何类型的编程,并且消除了对忆阻器的重新计算的需要。仿真结果验证了该方法的可行性。所提出的电路不仅可以与比较器互补,还可以与ADC互补。这将提供选择各种方法来测量忆阻电阻的可能性,无论是在编程期间还是在程序结束时监测忆阻电阻。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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