Wei Zhu, Jian Zhang, Jiawen Wang, Ruitao Wang, Chenguang Li, Kaiyang Wang, Yan Wang
{"title":"A Packaged 90-to-96GHz 16-Element Phased Array with 18.8/15.8dBm Psat/OP1dB, 14.8% TX PAE in 65nm CMOS Process and +51dBm Array EIRP","authors":"Wei Zhu, Jian Zhang, Jiawen Wang, Ruitao Wang, Chenguang Li, Kaiyang Wang, Yan Wang","doi":"10.1109/vlsitechnologyandcir46769.2022.9830350","DOIUrl":null,"url":null,"abstract":"This work presents a packaged 90-to-96GHz 16-Element transceiver phased array. It is constructed using 4-channel silicon beamformers in 65nm CMOS process, external power amplifiers (PAs) and low noise amplifiers in 100nm GaN process as well as Vivaldi antennas on a tsm-ds3 based printed circuit board (PCB). A transformer-and coupled-line-based 8-to-1 power combine technique is proposed in the silicon beamformer to achieve a measured Psat of +18.8dBm with an OP1dB of +15.8dBm and a peak PAE of 14.8% in CMOS. With external GaN PAs, the 16-Element transceiver phased array demonstrates a measured 26° 3-dB beamwidth, +51dBm peak EIRP at Psat and the ability to scan to ±30° in all planes.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This work presents a packaged 90-to-96GHz 16-Element transceiver phased array. It is constructed using 4-channel silicon beamformers in 65nm CMOS process, external power amplifiers (PAs) and low noise amplifiers in 100nm GaN process as well as Vivaldi antennas on a tsm-ds3 based printed circuit board (PCB). A transformer-and coupled-line-based 8-to-1 power combine technique is proposed in the silicon beamformer to achieve a measured Psat of +18.8dBm with an OP1dB of +15.8dBm and a peak PAE of 14.8% in CMOS. With external GaN PAs, the 16-Element transceiver phased array demonstrates a measured 26° 3-dB beamwidth, +51dBm peak EIRP at Psat and the ability to scan to ±30° in all planes.