A. Anchlia, R. Vinella, Daphne Gielen, K. Wouters, Vincent Vervenne, Peter Hooylaerts, P. Deroo, W. Ruythooren, D. De Gaspari, J. Das, P. Merken
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引用次数: 2
Abstract
Xenics has developed a family of stitched SWIR long linear arrays that operate up to 400 KHz of line rate. These arrays serve medical and industrial applications that require high line rates as well as space applications that require long linear arrays. The arrays are based on a modular ROIC design concept: modules of 512 pixels are stitched during fabrication to achieve 512, 1024 and 2048 pixel arrays. Each 512-pixel module has its own on-chip digital sequencer, analog readout chain and 4 output buffers. This modular concept enables a long array to run at a high line rates irrespective of the array length, which limits the line rate in a traditional linear array. The ROIC is flip-chipped with InGaAs detector arrays. The FPA has a pixel pitch of 12.5μm and has two pixel flavors: square (12.5μm) and rectangular (250μm). The frontend circuit is based on Capacitive Trans-impedance Amplifier (CTIA) to attain stable detector bias, and good linearity and signal integrity, especially at high speeds. The CTIA has an input auto-zero mechanism that allows to have low detector bias (<20mV). An on-chip Correlated Double Sample (CDS) facilitates removal of CTIA KTC and 1/f noise, and other offsets, achieving low noise performance. There are five gain modes in the FPA giving the full well range from 85Ke- to 40Me-. The measured input referred noise is 35e-rms in the highest gain mode. The FPA operates in Integrate While Read mode and, at a master clock rate of 60MHz and a minimum integration time of 1.4μs, achieves the highest line rate of 400 KHz. In this paper, design details and measurements results are presented in order to demonstrate the array performance.
Xenics公司开发了一系列的拼接SWIR长线性阵列,其工作频率高达400khz。这些阵列服务于需要高线路速率的医疗和工业应用以及需要长线性阵列的空间应用。该阵列基于模块化ROIC设计理念:在制造过程中缝合512像素的模块,以实现512、1024和2048像素的阵列。每个512像素模块都有自己的片上数字序列器,模拟读出链和4个输出缓冲器。这种模块化概念使长阵列能够以高线速率运行,而不管阵列长度如何,这限制了传统线性阵列的线速率。该ROIC采用InGaAs探测器阵列倒装。FPA的像素间距为12.5μm,有两种像素类型:方形(12.5μm)和矩形(250μm)。前端电路采用电容式跨阻抗放大器(CTIA),具有稳定的检测器偏置,良好的线性度和信号完整性,特别是在高速下。CTIA具有输入自动归零机制,允许具有低检测器偏置(<20mV)。片上相关双采样(CDS)有助于去除CTIA KTC和1/f噪声以及其他偏移,实现低噪声性能。在FPA中有五种增益模式,提供从85Ke-到40Me-的全井范围。在最高增益模式下,测量的输入参考噪声为35e-rms。FPA工作在integrated While Read模式下,主时钟速率为60MHz,最小集成时间为1.4μs,最高线率为400khz。本文给出了设计细节和测量结果,以证明该阵列的性能。