Silt: the bit-parallel approach

R. Barman, M. Bolotski, D. Camporese, J. Little
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引用次数: 7

Abstract

A particular form of parallelism, called bit-parallelism, is introduced. A bit-parallel organization distributes each bit of a data item to a different processor. Bit-parallelism allows computation that is sublinear with word size for such operations as integer addition, arithmetic shifts, and data moves. The implications of bit-parallelism for system architecture are analyzed. An implementation of a bit-parallel architecture based on a mesh with a bypass network is presented. Using a conservative estimate for cycle time, a Silt processor performs 64-b integer additions more than 10 times faster than the Connection Machine-2. Using current CMOS technology, a 16 M processor Silt system would be capable of nearly 500 billion 32-b adds per second. The application of the architecture to low-level vision algorithms is discussed.<>
淤泥:位并行方法
介绍了一种特殊形式的并行,称为位并行。位并行组织将数据项的每个位分配给不同的处理器。位并行性允许对整数加法、算术移位和数据移动等操作进行字长次线性的计算。分析了位并行对系统架构的影响。提出了一种基于网格和旁路网络的位并行结构的实现方法。使用周期时间的保守估计,淤泥处理器执行64-b整数加法的速度比Connection Machine-2快10倍以上。使用目前的CMOS技术,一个16m处理器的系统每秒可以处理近5000亿个32b的加法。讨论了该体系结构在低层次视觉算法中的应用。
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