Lightweighted FPGA Implementation of Even-Odd-Buffered Active Noise Canceller with On-Chip Convolution Acceleration Units

Seunghyun Park, Daejin Park
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引用次数: 1

Abstract

To make the acoustic signal that was processed by the noise canceller sound more natural for users [1]–[3], the delay in anti-noise generation should be reduced. For a single buffer, processing delay occurrs because it is impossible to write input signals while the processor is processing the data. when interfering with anti-noise and output signal, this processing delay creates additional buffering overhead to match the phase. The processing delay can be minimized using an Even-/Odd-buffer Structure to alternately read and write operations. In addition, the differences between the two methods of noise cancellation (FFT-based noise cancellation and adaptive algorithm) are compared in terms of output signal quality, processing time, and power consumption. As a result, using an Even-/Odd-buffer, reduced the processing delay of a single buffer. The FFT-based noise canceling method experienced fewer errors than the adaptive noise canceling method.
带有片上卷积加速单元的奇偶缓冲有源消噪器的轻量级FPGA实现
为了使消噪器处理后的声信号对用户来说听起来更加自然[1]-[3],需要减小抗噪产生的延迟。对于单个缓冲区,处理延迟的发生是因为处理器在处理数据时不可能写入输入信号。当干扰抗噪声和输出信号时,这个处理延迟会产生额外的缓冲开销来匹配相位。使用偶/奇缓冲结构交替进行读写操作可以最小化处理延迟。此外,比较了两种降噪方法(基于fft的降噪和自适应算法)在输出信号质量、处理时间和功耗方面的差异。因此,使用偶数/奇数缓冲区可以减少单个缓冲区的处理延迟。基于fft的消噪方法比自适应消噪方法误差更小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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