Threshold voltage instability at low temperatures in partially depleted thin film SOI MOSFETs

J. Wang, N. Kistler, J. Woo, C. Viswanathan
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Abstract

The threshold voltage instability at low temperatures due to the floating Si film in partially depleted SIMOX was examined at low temperatures under normal operating conditions. Floating-film SOI MOS transistors suffer an accumulation of holes generated by impact ionization near the drain, at the lower Si film interface. As the potential at this interface increases due to hole accumulation, the source junction becomes forward biased, limiting the amount of charge which can accumulate. This causes the saturation kink effect. The increase in potential at the lower interface acts analogously to a positive bias in bulk devices and effectively decreases the threshold voltage of the device. The use of the channel contact alleviates the hole accumulation effect by providing a conducting path for the generated holes. Hence, the grounded film exhibits a higher threshold voltage than the floating film.<>
部分耗尽薄膜SOI mosfet的低温阈值电压不稳定性
在正常工作条件下的低温条件下,研究了部分耗尽SIMOX中漂浮的Si膜在低温下的阈值电压不稳定性。浮膜SOI MOS晶体管在低硅膜界面的漏极附近受到冲击电离产生的空穴积累。由于空穴积累,该界面上的电位增加,源结变得正向偏置,限制了可以积累的电荷量。这就导致了饱和扭结效应。下界面电位的增加类似于大块器件中的正偏置,有效地降低了器件的阈值电压。通道接触的使用通过为生成的孔提供导电路径来减轻孔积累效应。因此,接地膜比浮膜具有更高的阈值电压
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