A Large-Scale Application Mapping in Reconfigurable Hardware Using Deep Graph Convolutional Network

Abstract

Reconfigurable Computing (RC) systems are capable of hardware implementation for processing speedup with different reconfiguration features. They are key elements in nowadays High Performance Computing (HPC) systems with enormous demand of application execution. This paper aims to reduce the compilation time of RC applications by providing a hierarchical model in the mapping part. In this model, the application graph is clustered by using a Graph Convolutional Network (GCN). Merging information of neighborhood nodes in the layers of GCN, the network is trained to classify the nodes into least dependent clusters. To reduce the heavy computations of mapping operation, it is performed in independent steps, inter-cluster, and intra-cluster mappings. Intra-cluster mapping organizes logic blocks in small regions and inter-cluster mapping places these regions in the implementation area by using an average distance metric. Simulation results showed that high-quality solutions for the mapping problem have been achieved faster in comparison with previous works.