{"title":"On Line Data and Voice Encryption System Based on FPGA Technology","authors":"I. Ashour","doi":"10.1109/NRSC.2007.371402","DOIUrl":null,"url":null,"abstract":"A secure, low cost and fast full-duplex on line data and voice encryption systems were designed implemented and tested. The design was based on FPGA technology using SAFER 64 (secure and fast encryption routine) algorithm. The FPGA was designed, simulated and synthesized using ISE and Mentor Graphics EDA tools. The overall system was tested successfully on public switch telephone networks (PSTN). The encryption with key generator, and system control modules was synthesized and implemented using low cost 200,000-gate Xilinx Spartan-3 XC3S200 FPGA.","PeriodicalId":177282,"journal":{"name":"2007 National Radio Science Conference","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 National Radio Science Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NRSC.2007.371402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A secure, low cost and fast full-duplex on line data and voice encryption systems were designed implemented and tested. The design was based on FPGA technology using SAFER 64 (secure and fast encryption routine) algorithm. The FPGA was designed, simulated and synthesized using ISE and Mentor Graphics EDA tools. The overall system was tested successfully on public switch telephone networks (PSTN). The encryption with key generator, and system control modules was synthesized and implemented using low cost 200,000-gate Xilinx Spartan-3 XC3S200 FPGA.