Single fault diagnosis in analog circuits: A multi-step approach

Abstract

This paper presents a completely renewed technique developed to locate single parametric faults in analog circuits by means of multi-frequency measurements or simulations, following a rigorous approach. The technique is composed by three separated stages, a first one which evaluates the testability and ambiguity groups of the Circuit Under Test (CUT), a second one which localizes the fault classifying it in an appropriate Fault Class (FC) and a last one (optional) that can extract the value of the faulty component. The manufacturing tolerances of the healthy components are taken into account at each stage of the method.