Null holographic test structures for the measurement of overlay and its statistical variation

S.A. AbuGhazeleh, P. Christie, V. Agrawal, J. Stevenson, A. Walton, A. Gundlach, S. Smith
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引用次数: 3

Abstract

Results are presented on the use of null wire segment holograms for the in-line assessment of mask alignment errors in the chip fabrication process. Process variations are detected by measuring the light intensity generated by a hologram designed to project a null image. To detect alignment errors, the mask for the wire segment hologram is distributed between two mask layers. If the two sets of diffracting structures defined by the masks are transferred to the wafer with perfect registration, the result is an area of light cancellation (null) in the image plane. Increased mask misalignment leads to imperfect wavefront cancellation which is manifested as an increase in light intensity in the null region. In order to characterize misalignment under controlled conditions, the two portions of the holographic test structure were initially recombined into a single structure but with intentional misalignment between the two portions designed into the mask. The technique was then used to characterize the alignment errors between two separate masks, with the actual fabricated offsets measured by atomic force microscopy. Initial results indicate the technique is capable of resolving 0.1 /spl mu/m mask misalignment for a 1 /spl mu/m minimum feature process.
用于测量覆盖层及其统计变化的零全息测试结构
本文介绍了利用零线段全息图在线评估芯片制造过程中掩模对准误差的结果。过程变化是通过测量由设计为投射零图像的全息图产生的光强度来检测的。为了检测线段全息图的对准误差,将线段全息图的掩模分布在两个掩模层之间。如果将由掩模定义的两组衍射结构以完美配准的方式转移到晶圆上,则会在成像平面上产生光抵消(null)区域。增加的掩模不对准导致不完美的波前抵消,这表现为零区光强的增加。为了表征在受控条件下的错位,全息测试结构的两个部分最初重组为一个单一的结构,但在设计成掩模的两个部分之间故意错位。该技术随后被用于表征两个独立掩模之间的对准误差,并用原子力显微镜测量实际制造的偏移量。初步结果表明,该技术能够在1 /spl mu/m的最小特征过程中解决0.1 /spl mu/m的掩模错位。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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