Design of a low-cost and high-speed neurocomputer system

Abstract

This paper presents a new parallel computer architecture for high-speed emulation of any neural network model. The system is based on a new ASIC (Application Specific Integrated Circuit) that performs all required arithmetical operations. The essential feature of this ASIC is its ability to adapt the internal parallelism dynamically to the data precision for achieving an optimal utilization of the available hardware resources. Four ASICs are installed on one board of the neurocomputer system and emulate in parallel a neural network in a synchronous operation mode (SIMD architecture). By additional boards the system performance and also the size of the neural networks that can be simulated is increased. The main advantage of the system architecture is the simplicity of the design allowing the construction of low cost neurocomputer systems with a high performance. The achieved performance depends on the data precision, and the number of installed boards. In the case of 16 bit weights and only one board a performance of 480 MCPs and 120 MCUPs (using backpropagation) can be obtained.