Numerical Environment for Modeling and Analyzing Transients in Static VAR Compensators

Abstract

The paper presents a numerical model of a Static Var Compensator (SVC). The model is suitable for simulating transients caused by switching the SVC module to the grid. The objective is to allow comparison of various SVC topologies during the design stage of SVC development and to verify that the operating conditions of the thyristors, capacitor and inductor stay within limits specified by the manufacturer. The model is verified against laboratory measurements. Simulation results for several SVC topologies are presented and discussed.