FPGA implementation of a new hybrid modulation strategy for a modified dual bridge multilevel dc-link inverter topology

Abstract

The paper evolves a new hybrid modulation strategy to incarnate a higher quality sinusoidal output voltage from a modified dual bridge multilevel dc-link inverter (DBMLDCLI) topology. The scheme is developed to minimize the switching loss in power devices. The proposed modulation strategy is derived from the fundamental switching and pulse width modulation (PWM) through modified sinusoidal reference function. The VHDL algorithm is suitably developed to imbibe the proposed modulation strategy and simulated in Modelsim software. The proposed algorithm is implemented in Xilinx spartan3E-500 FG 320 processor and the simulation results accorded with the experimental results.