RRAM Crossbar-Based Fault-Tolerant Binary Neural Networks (BNNs)

A. Gebregiorgis, Artemis Zografou, S. Hamdioui
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引用次数: 1

Abstract

Computation-In Memory (CIM) using RRAM crossbar array is a promising solution to realize energy-efficient neuromorphic hardware, such as Binary Neural Networks (BNNs). However, RRAM faults restrict the applicability of CIM for BNN implementation. To address this issue, we propose a fault tolerance framework to mitigate the impact of RRAM faults on the accuracy of CIM-based BNN hardware. Evaluation results using MNIST, Fashion-MNIST and CIFAR-10 datasets demonstrate that the proposed framework outperforms the related works as it restores more than 99% of the RRAM fault induced accuracy reduction with relatively less overhead.
基于RRAM交叉栏的容错二值神经网络
内存计算(CIM)是实现高效节能的神经形态硬件,如二元神经网络(BNNs)的一种很有前途的方法。然而,RRAM故障限制了CIM在BNN实现中的适用性。为了解决这个问题,我们提出了一个容错框架,以减轻RRAM故障对基于cim的BNN硬件精度的影响。使用MNIST、Fashion-MNIST和CIFAR-10数据集的评估结果表明,所提出的框架优于相关工作,因为它以相对较少的开销恢复了99%以上的RRAM故障导致的精度降低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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