Case study of a high speed three-dimensional graphics chip set

Abstract

Design efforts to implement a 3-D graphics chip set are presented. The set contains designs ranging from a 10000-gate 1.5-micron gate array to a 208-pin, 50000+-gate 1.0-micron silicon compiled design containing RAM and datapath structures. The resulting graphics system contains 85 ASIC chips representing 10 different designs. Overviews of design entry, logic synthesis, physical design, package selection, vector generation, simulation, and test program development are provided. Further information reflecting hardware requirements, and design cycle times is included.<>