3D packaging technology overview and mass memory applications

Abstract

In response to the need for significant reductions in size and weight of digital electronic systems, several companies have developed packaging technologies that focus on miniaturization of memory functions. This paper describes the four basic three dimensional (3D) memory packaging technologies. Physical descriptions and sample photographs of the options provided. Metrics of packaging are developed to provide potential users a means of determining which technology might be best suited to their application. The basics of how to apply 3D memory products are also discussed. Consideration of design and test decisions on product cost are discussed. Also provided are examples of how 3D memory modules may be used in both processor multichip module (MCM) applications and in mass memory (solid-state recorder) applications.