Fabrication of dielectric insulation layers in TSV by different processes

Abstract

The dielectric insulation layer is critical to the TSV package reliability and the process of forming sidewall insulation of through silicon via (TSV) was a challenging bottleneck in 3D integration. In this paper, dielectric insulation layers in TSV with aspect ratio of 10:1 were fabricated by PECVD tetraethyl orthosilicate (TEOS) process and thermal oxidation process. The morphology and step coverage of the dielectric insulation layers were characterized using field emission scanning electron microscopy (FESEM). The electrical performance of blanket PECVD TEOS films and thermal oxide films were investigated by mercury probe Voltage-current (I-V) and Capacitance - Voltage (C-V) measurements. The PECVD TEOS films show good conformality, high breakdown voltage and low current leakage. The thermal oxide films have higher step coverage of almost 100% and lower leakage current. By combining PECVD TEOS process and thermal oxidation process, dual thermal oxide/PECVD TEOS insulation layers with high step coverage are fabricated.