{"title":"Reduction of Radiated Far-Field Emission and Susceptibility Using a Suspended Metal Loop","authors":"M. Koohestani, M. Ramdani, R. Perdriau","doi":"10.1109/EMCEUROPE48519.2020.9245726","DOIUrl":null,"url":null,"abstract":"This paper presents the use of a small simple loop above a printed circuit board (PCB) to mitigate both the emission at 1 m (suggested by CISPR-25) and far-field susceptibility of a patch located on the PCB (used as an approximation for an integrated circuit). Loop parameters were optimized through full-wave simulations with respect to patch size, loop-to-PCB distance and operating frequency. This technique makes it possible, at the same time, to reduce emission by an average of 83%, and to decrease H-field coupling to the integrated circuit pins along with E-field amplitude, thus reducing susceptibility. This study clearly demonstrates the relevance of that simple and inexpensive approach for practical use in applications such as complex high-speed electronics including Systems-in-Package (SiP).","PeriodicalId":332251,"journal":{"name":"2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMCEUROPE48519.2020.9245726","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents the use of a small simple loop above a printed circuit board (PCB) to mitigate both the emission at 1 m (suggested by CISPR-25) and far-field susceptibility of a patch located on the PCB (used as an approximation for an integrated circuit). Loop parameters were optimized through full-wave simulations with respect to patch size, loop-to-PCB distance and operating frequency. This technique makes it possible, at the same time, to reduce emission by an average of 83%, and to decrease H-field coupling to the integrated circuit pins along with E-field amplitude, thus reducing susceptibility. This study clearly demonstrates the relevance of that simple and inexpensive approach for practical use in applications such as complex high-speed electronics including Systems-in-Package (SiP).