Reduction of Radiated Far-Field Emission and Susceptibility Using a Suspended Metal Loop

M. Koohestani, M. Ramdani, R. Perdriau
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引用次数: 2

Abstract

This paper presents the use of a small simple loop above a printed circuit board (PCB) to mitigate both the emission at 1 m (suggested by CISPR-25) and far-field susceptibility of a patch located on the PCB (used as an approximation for an integrated circuit). Loop parameters were optimized through full-wave simulations with respect to patch size, loop-to-PCB distance and operating frequency. This technique makes it possible, at the same time, to reduce emission by an average of 83%, and to decrease H-field coupling to the integrated circuit pins along with E-field amplitude, thus reducing susceptibility. This study clearly demonstrates the relevance of that simple and inexpensive approach for practical use in applications such as complex high-speed electronics including Systems-in-Package (SiP).
利用悬浮金属环降低辐射远场发射和磁化率
本文介绍了在印刷电路板(PCB)上使用一个小的简单环路来减轻1米处的发射(CISPR-25建议)和位于PCB上的贴片的远场磁化率(用作集成电路的近似)。通过全波仿真优化了环路参数,包括贴片尺寸、环路到pcb的距离和工作频率。同时,该技术使平均减少83%的发射成为可能,并减少h场与集成电路引脚的耦合以及e场振幅,从而降低磁化率。这项研究清楚地表明,这种简单而廉价的方法与实际应用的相关性,如复杂的高速电子产品,包括系统级封装(SiP)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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