Rapid prototyping for communications design validation

Abstract

System emulation technology enables users to rapidly prototype HDL-based designs on programmable hardware before committing their designs to production. In this paper, we show that this methodology is particularly viable for at-speed verification of communications designs. We show how complimentary tools can be used to generate HDL code for a digital wireless communications system. Then we consider how this design can be implemented and evaluated using a rapid prototyping methodology. Synthesis produces a gate-level specification for implementation in FPGAs which are combined with other components in the Aptix rapid prototyping environment. Issues discussed include: software tool flows, prototype hardware assembly, system performance, and debugging.