Routing algorithms for multi-chip modules

Abstract

Routing algorithms for multi-chip modules are presented. Two routing strategies, a channel routing and a grid-based routing, are discussed. The channel routing enables the designer to examine an effective routing during the placement phase. The grid-based routing calculates the net ordering with a new cost function and includes an effective rip-up and reroute procedure. The routing results of three different multichip modules are presented. Experimental results show that there is no direct correlation between the routing results of the channel algorithm and the grid-based one. It is concluded that channel routing is preferable only if the placement structure enables the generation of regular channels. In all other cases the grid-based algorithm is more effective using the channel routing just as a fast placement estimation.<>