A broadband packet switch with input and output queueing

Abstract

The location of the packet buffers is one of the primary elements characterizing the direrent proposals of broadband packet switch architectures. Input queueing, internal queueing and output queueing switches can be considered the basic switch architectures. Euch of these clarses has difSerent advantages and drawbacks. Adopting in the same switch two diyerent queueing techniques with a suitable hardware design can provide substantial performance improvements. Nevertheless, congestion control procedures can become more complex, as packet loss in a switch can in principle originate in two direrent places, not one. We describe here a broadbandpacket switch using a Batcher-banyan interconnection network with input and output queueing that b able to t r a d e r more than one packet per slot to a given switch outlet. A probe-ack contention resolution mechanism is adopted to select the confict-pee paths for the packets to be transferred through the interconnection network Owing to thisscheme buffer overfow at the output ports is prevented